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Intel 8086 Assembly Microcomputer

A complete Intel 8086 microprocessor system designed and simulated in Proteus, featuring external RAM/ROM interfacing, Intel 8255 PPI, keypad input, seven-segment display output, and firmware written entirely in Intel 8086 Assembly.


Project Overview

This project implements a complete Intel 8086-based microcomputer using external memory and peripherals. The processor communicates with SRAM, EPROM, and an Intel 8255 Programmable Peripheral Interface through custom address decoding logic. User input is collected from a 3×4 keypad, stored in external RAM, translated using a lookup table in ROM, and displayed on a seven-segment display.


System Architecture

Intel 8086 Microprocessor

The Intel 8086 serves as the central processing unit, executing the Assembly firmware and controlling communication with memory and peripherals.


Address Decoder

The address decoder generates the chip-select signals required for each external device, ensuring that RAM, ROM, and the Intel 8255 respond only within their assigned address ranges.


External RAM

The SRAM stores every digit entered from the keypad sequentially until the display operation is requested.


External ROM

The EPROM stores the BCD-to-Seven-Segment lookup table used to convert numeric digits into display patterns.


I/O Interface (Intel 8255)

The Intel 8255 provides communication between the processor, the keypad, and the seven-segment display.

  • Port A → Keypad Rows
  • Port C → Keypad Columns
  • Port B → Seven-Segment Display

Software Workflow

Initialize 8086
        │
        ▼
Configure Intel 8255
        │
        ▼
Scan Keypad
        │
        ▼
Store Digits in SRAM
        │
        ▼
'*' Pressed?
        │
       Yes
        ▼
Read SRAM
        │
        ▼
Read Lookup Table from EPROM
        │
        ▼
Output Seven-Segment Code

Features

  • Intel 8086 Assembly Firmware
  • External SRAM Interface
  • External EPROM Interface
  • Intel 8255 Programmable Peripheral Interface
  • Address Decoding Logic
  • Memory Mapping
  • Matrix Keypad Scanning
  • Seven-Segment Display Driver
  • BCD-to-Seven-Segment Lookup Table
  • Proteus Simulation

Technologies

  • Intel 8086
  • Intel 8255 PPI
  • Assembly Language
  • Proteus Design Suite
  • Digital Logic
  • Memory Mapping
  • Address Decoding

Repository Structure

.
├── Assembly/
│   └── main.asm
│
├── ROM/
│   └── lookuptable.bin
│
├── Proteus/
│   └── 8086_System.pdsprj
│
├── images/
│   ├── 8086.png
│   ├── address-decoder.png
│   ├── ram.png
│   ├── rom.png
│   └── io.png
│
└── README.md

How to Run

  1. Open the Proteus project.
  2. Load lookuptable.bin into the EPROM.
  3. Assemble the firmware.
  4. Start the simulation.
  5. Enter digits using the keypad.
  6. Press * to display the stored sequence.

License

Developed for educational purposes as part of a Microprocessor Laboratory course.

About

A complete Intel 8086 microprocessor system designed and simulated in Proteus featuring external RAM/ROM interfacing, 8255 Programmable Peripheral Interface (PPI), keypad input, seven-segment display output, and assembly-based firmware with custom memory mapping and address decoding.

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